High Resolution, 15-micron thin, Pixellated, Back-illuminated SOI CMOS Vertex Sensor

The physics of future Linear Colliders demand the best possible vertex detector performance in terms of high-granularity, high-precision, high-efficiency, and triggerless operation. Monolithic silicon-on-insulator (SOI) complementary metal oxide semiconductor (CMOS) pixilated detectors offer a nearly ideal solution to these requirements. SOI circuitry is isolated from the charge generation region, allowing high-resistivity, fully-depleted detectors to be used. As ground returns are isolated, substrate bounce and transient coupling problems related to EMI are eliminated, allowing higher operating speeds, lower noise, and more robust performance in harsh environments. SOI, because of its planar structure, easily passivates surfaces for low dark-current generation. This advantage, in turn, makes the device resistant to ionizing radiation. In Phase I, a three-dimensional, stacked, low-occupancy, fully-depleted, SOI CMOS pixilated detector, thinned to 15-microns, will be designed and prototypes will be fabricated. In Phase II, fully-functional 22-mm x 22-mm SOI CMOS HEP detectors will be fabricated, extensive performance and reliability testing will be performed, and the tiling of the arrays on thin substrates will be addressed. Commercial Applications and other Benefits as described by the awardee: High performance, back-illuminated CMOS imagers should find a wide range of applications, including star trackers and other space imaging. The DoD relies on the celestial reference frame for many purposes ¿ satellite attitude determination, payload calibration, payload pointing, in-course missile adjustments, and space surveillance all depend on the celestial reference frame. Moreover, there is a demand throughout the nuclear physics, x-ray synchrotron, and the medical and bio-medical communities for higher performance detectors.