DIGITAL PROCESSING ELECTRONICS FOR X-RAY DETECTOR ARRAYS

MANY AREAS OF SYNCHROTRON RADIATION INVESTIGATION ARE SEVERELY DETECTOR LIMITED, PARTICULARLY IN CASES WHERE SINGLE SINGLE PHOTON, ENERGY DISPERSIVE COUNTING IS REQUIRED. BECAUSE THE MAXIMUM COUNT RATE FOR A SINGLE DETECTOR AT A GIVEN ENERGY RESOLUTION IS LIMITED, ARRAYS OF DETECTORS ARE BEING CONSTRUCTED TO INCREASE TOTAL COUNT RATES. THIS APPROACH IS NOW RESTRICTED BY THE COST, PHYSICAL SIZE, AND COMPLEXITY OF THE REQUIRED ANALOG PROCESSING ELECTRONICS. INITIAL STUDIES HAVE INVESTIGATED THE POSSIBILITY OF DEVELOPING DIGITAL PROCESSING ELECTRONICS BASED ON CONCEPTS OF DIGITAL SIGNAL PROCESSING. THESE STUDIES SUGGEST THAT IT SHOULD BE POSSIBLE TO MATCH THE RESOLUTIONS OF CURRENT ANALOG SYSTEMS WHILE INCREASING PROCESSING SPEEDS BY FACTORS OF 2 TO 6 AND DECREASING BOTH COSTS AND PHYSICAL SIZES BY AN ORDER OF MAGNITUDE. THIS PROJECT'S OVER-ALL GOAL IS TO DETERMINE WHETHER IT IS ACTUALLY POSSIBLE TO CONSTRUCT SUCH DIGITALLY BASED SIGNAL PROCESSING SYSTEMS. IN PARTICULAR, THIS WORK AIMS TO IDENTIFY OPTIMUM FILTER DESIGNS, EVALUATE THE PERFORMANCE OF THESE FILTERS WITH REAL PRE-AMPLIFIERS, AND DEVELOP AN IMPLEMENTABLE DESIGN USING COMMERCIALLY AVAILABLE HARDWARE TO THE GREATEST EXTENT POSSIBLE. IN PHASE I, DIGITIZED RECORDS OF DETECTOR PRE-AMPLIFIER OUTPUTS ARE BEING COLLECTED AND USED AS INPUT DATA FOR MODELING THE BEHAVIOR OF DIGITAL FILTER DESIGNS. THE PERFORMANCE OF VARIOUS DIGITAL FILTER DESIGNS IS BEING INVESTIGATED. AN EXPLANATION IS BEING DEVELOPED OF THE FEATURES THAT RESULT IN SUPERIOR FILTER PERFORMANCE, AND OPTIMIZED FILTER DESIGNS ARE BEING DEVELOPED. SYSTEM LEVEL DESIGNS FOR THE OPTIMIZED FILTER ARE BEING PRODUCED, AND ANY CHANGES IN THEIR EXPECTED PERFORMANCE AS A RESULT OF ENGINEERING TRADE-OFFS OR HARDWARE RESTRICTIONS ARE BEING EVALUATED. THE MOST PROMISING FILTER DESIGN WILL BE SELECTED AND INCORPORATED INTO A DETAILED CIRCUIT DESIGN OF A COMPLETE DIGITAL FILTERING PROCESS ARRAY THAT CAN BE FABRICATED IN PHASE II.