New Design Technologies for Radiation Hardened Microelectronics

Radiation-hardening by design (RHBD) allows to use available commercial fabrication lines of high performance circuits, but the radiation-hardened (rad-hard) devices and cells require larger area, higher-power consumption, and slower performance. CFDRC incollaboration with Mission Research (David Alexander) and Vanderbilt University (Ronald Schrimpf) is proposing to develop novel, radiation-hardened by design concepts, at the transistor and primitive cell level, that are spatially compact in comparison tocurrently used rad-hard designs. The new, innovative rad-hard circuit design technology will include: 1) An integrated computational environment to provide quantitative assistance in developing new rad-hard designs, utilizing 3D device simulations withadvanced semiconductor models enhanced with radiation effects; 2) Numerical, automated optimization of primitive logic and memory cell designs (layouts) for mitigation of Single Event Effects in modern submicron CMOS technologies, including SOI; 3)Calculation of key operational parameters of the designed cells, to indicate that the designs will tolerate radiation exposure to specified levels. Special attention will be given to single event latchup (SEL) vulnerability. In Phase II, the RHBD softwarewill be enhanced with TID phenomena, and the optimized designs of primitive logic and memory cells will be fabricated and electrically characterized to demonstrate their radiation-hardness to TID, SEL, and SEU.All federal and commercial organizations thatare involved in putting vehicles into space would benefit greatly by having access to high-performance, radiation-hardened microelectronics that are readily and cost-effectively produced. DoD also has many non-space applications for radiation-hardenedmicroelectronics.