Distributed ATM Optical Interconnect

The demand for high performance, high bandwidth communication networks for aggregating processing power is constantly increasing. The next generatoion of computer networks will require high bandwidth (> 1Gb/s) and low latency interconnects. The networks should be scalable, modular, and interoperable. We propose a distributed ATM optical interconnect that can meet these requirements. It utilizes byte-wide WDM optical links and photonic switches to simultaneously achieve high bandwidth and low latency. It combines the ShuffleNet architecture with ARM protocols to provide scalability and interoperability. The network will consist of plug-in cards which interface each processor to a fiber-optic ShuffleNet interconnect. Each card will consist of a photonic switch, WDM optical link, ATM protocol processor, and a machine-specific bus interface. We have identified two initial target applications for the distributed ATM optical interconnect. It can be used to network clusters of computers to provide more processing power than any one machine can presently provide. It can also be used to within a multiprocessor computer to interconnect memory modules to processors. In terms of defense technology conversion, this program proposes to take state-of-the art devices developed by JPL under BMDO sponsorship and commercialize the manufacturing process to realize cost-effective high data rate ATM optoelectronic network products. Anticipated Benefits: The distributed ATM optical interconnect proposed here will provide a modular and scalable product for constructing ATM networks. It is a cost effective solution in that the network can growi incrementally by adding plug-in cards to processors as needed.