Conformal Electronic Packaging

DOD is currently exploring fabrication approaches, such as overlay interconnect (GE/TI) and flip chip on silicon (E-systems/Nchip). However, there is an opportunity to (1) implement and extend the capability of flip TAB (e.g., 2 mil pitch) technology to a generic multilayer/variable lead pitch reliable/compliant interconnect means to significnatly reduce the typical cost of customized TAB tape and still take advantage of TAB tape testing/reworkability features; (2) configure a precision automated manufacturing workcell to concurrently handle dissimilar packaging technology, components (e.g., flip chip, flip TAB, bare chip), place them onto nonflat substrates (e.g., ceramic, 3D flexcircit); and (3) develop a generic, low cost 2D/3D, reworksable/repairable, compliant, TAB tape-like interconnect technique. The proposed program will demonstrate the feasibility of the novel interconnect concepts in Phase I, in terms of compeitive performance/cost tradeoffs and process development and related application experiments concerning 3D based interconnect product opportunities. Then Phase II will develop proof-of-concept designs, implement prototype smaples, and perform appopriate evaluation (electrical, thermal, mechanical) on test structures, measurements, together with a processing equipment implemenation plan. A key factor in the viability (e.g., cost, placement, accuracy, yield, reliability, reworkability) of the proposed low cost interconnect concept is usage of a precision, rapidly trainable vision-aided robotic assembly workcell to cost effectively populate the nonflat 3D substate with the components, including automation of most, if not all, of the related process steps (e.g., solder reflow, electrical performance test, mechanical pull test, visual inspection). ANTICIPATED BENEFITS: The benefits of the proposed work are the development of a low cost generic/multipurpose reliable, compliant interconnect methodology that can accommodate a broad variety of interconnect requirements (e.g., between multiple 3D component layers, between components and 3D substrates). This fabrication methodology will lead to life cycle cost-effective means for interconnecting components t