STTR Phase II: Splintered Topologically Close-Packed (TCP) Offload Engine for Grid Computing and Bandwith-Delay Product (BWDP)

This Small Business Technology Transfer (STTR) Phase II research project addresses the challenges of networks with extreme bandwidth delay products. Bulk data transfer over such networks used by national research laboratories and aerospace companies need to be provided with the endpoint resources required to ensure high performance in a cost effective manner. The outcomes of this project attempts to provide compatibility with present and future versions of GridFTP. The project addresses these challenges through the use of a novel offload engine. During the Phase I project, the feasibility of deriving and simulating the offload engine architecture, firmware, and creation of intellectual property (IP) for low-cost, high-performance field programmable gate array (FPGA) subsystems was completed. Successful results from this research will significantly advance the state of the art for off-load engines used in grid computing. Immediate applications include accommodating the e-Science community's need for scalable 10-100 Gbps off-load engines, while supporting present and future versions of GridFTP. Other applications include the use of our ultra high-speed offload engines for grid and cluster computing, utilizing our open source firmware. The FPGA code resulting from this project has the potential to be used as intellectual property that could then be marketed to off-load engine manufacturers. These IP cores would accrue cost-effective savings for existing engine firms and would accelerate products to the market.