High Speed spatial light modulators for high energy laser beam control

This project is to investigate a high-speed spatial light modulator (SLM) which is capable of amplitude and phase modulation at 1 GHz and above. The device can have a high laser induced damage threshold (LIDT) of 10 MW/cm2 and above. The structure is based on advances in coupled photonic crystal cavities, crystalline semiconductor coating technologies, and an integrated photonic/electronic scheme. Currently commercial SLM products are largely limited to modulation speeds in the kHz or low MHz regime. We will demonstrate a non-mechanical high-speed SLM combined with a read-out integrated circuit (ROIC) for individual pixel control, capable of switching speeds on the order of 1 GHz, which is multiple orders of magnitude faster than the state of the art. In collaborations with our industry partner, crystalline compound semiconductor thin films on transparent substrates will be incorporated for HEL DE applications with high LIDT and excellent thermal management capabilities. The proposed research is based on advances realized over the last 17 years by the team on defect-free photonic crystal cavities for free-space beam manipulation and light-matter interactions. The proposed approach has the following innovative features: (1) High speed: The structure can operate at GHz switching speeds, which will be 2-3 orders of magnitude faster than all other approaches based on liquid crystals or deformable mirrors; (2) High LIDT: The use of crystalline GaAs films can ensure excellent LIDT values of MW/cm2 or higher; (3) Reliable: The structure is based on semiconductor and dielectric materials, which is all solid state without any moving parts; (4) Compact: The proposed structure can be built directly with conventional CMOS process employing similar integration schemes including ROICs combined via a hybridization process, similar to current commercial SLM devices; and (5) Scalable: The proposed architecture is based on the integrated photonic manufacturing process, which ensure its manufacturing scalability and device pixel scalability.