SBIR/STTR Research Award

High Current Vertical Photoconductive Semiconductor Switch (PCSS) and Trigger Subsystem

Award identifier c6b8fd00601469d1b59f2139e6644941a0f683b78829372a809afcfaed3bc54dAwarding agency Department of Defense · Defense Microelectronics Activity

Award amount

$197,264

Program and phase

SBIR · Phase I

Award year

2023

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Award details

Awarding agency
Department of Defense
Branch
Defense Microelectronics Activity
Recipient company
Eureka Aerospace
Proposal award date
2023-08-03
Contract end date
2024-02-08
UEI
GW1PKQ7NNJJ9
Solicitation number
23.1
Topic code
DMEA231-005

Research abstract

Implementation of multiple parallel current-sharing filaments in high-voltage photoconductive semiconductor switches (PCSS) has been shown to be very effective in scaling the current handling capability of the devices. This approach increases the active current-switching area on the surface of the device to handle higher total current. In this effort, we will develop a vertical geometry PCSS that will utilize the volume of the device to implement a 3D array of current-sharing filaments, greatly enhancing the current handling of the device.  Current sharing will be achieved by triggering the current filaments with vertical lines of light through the bulk of the wafer to control their number and location.  This implementation will also have advantages of operation at high internal fields compared to the surface breakdown limit for high voltage and improved current distribution between the surface-normal filaments and the planar contacts for dramatically improved total current handling and high-field operation.  While lateral PCSSs through-current is limited by the surface area of the switch, the vertical or so-called bulk PCSS can handle much larger currents due to their 3D nature, potentially rendering N2 current filaments compared to only N filaments in the lateral switch (assuming the same pitch between the filaments. This opens a door to new optically-triggered PCSS designs that show great promise for scaling to switches capable of 100kV (DC) and 10kA current that can be realized by (1) employing longer (thicker) semiconductor bulk material in the vertical PCSS or (2) stacking shorter bulk vertical PCSSs in parallel to achieve 100's of kA with 105 shot lifetime. The new vertical switch design configuration generates parallel filaments in the bulk GaAs (as opposed to just beneath the surface as in lateral PCSS designs) to achieve breakdown fields close to the maximum for the bulk GaAs while operating in air, and with 2-D scalability of the number of current-sharing filaments. This design also may be highly compatible with 2-D VCSEL arrays for optical triggering. Limited tests using vertical switches, carried out by Sandia National Labs utilized standard thickness wafers to trigger 0.4kA at 35kV/cm (limited by 0.6mm wafer thickness), tested to 105 shots with no detectable degradation of switch performance. Higher fields, total current, and switching voltages would be achievable with thicker GaAs wafers.

Technology keywords

Not reported

Other awards by this recipient

Verified by the same UEI. These are other public SBIR/STTR award pages, not a merged company record.

Awards with the same topic code

Verified by an exact topic code match. This is not a text-similarity match.

Research funding history

11 SBIR/STTR records share this UEI (2002–2023). Reported award amounts total $1,926,262. Reported amounts are not federal obligations.

Phases: Phase I, Phase II

Agencies: Department of Defense

Agency intelligence

Department of Defense

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