Radiation-Induced Upset Circumvention & Recovery for Modern Electronics Systems

C&R is a system-level approach to hardening electronics to nuclear weapon high dose rate effects. It enables a high-level system function to meet specified radiation requirements even though certain subsystem functions are implemented with components having lower hardness levels. A typical C&R scheme may involve the use of a high-performance central processor unit (CPU) that does not meet the system level radiation requirements for upset, or even latch-up, threshold, but is provided rapid and orderly error handling, fault isolation, and power-down/reset functions by upper radiation-hardened parts. Established concepts for C&R and their hardware implementations have not kept pace with advances in semiconductor technology. M&A proposes to continue developing modernized approaches to Nuclear Upset Circumvention & Recovery (NUC&R). The program we are proposing will enable architecture flexibility through mixed use of hardened and unhardened microelectronics to achieve overall system-level hardness requirements. Our proposed effort addresses both hardware and software aspects of C&R, considers digital as well as analog/power functions within a C&R system, and modeling & simulation as well as real hardware demonstration. A key theme in our work is an emphasis on flexibility over a single point solution.