SBIR Phase I: On-chip Real-Time RF Interference Detector

The broader/commercial impact of this Small Business Innovation Research (SBIR) Phase I project is to investigate the feasibility of building a compact (chip-level) interference detection system for the wireless spectrum, which helps to grow the available spectrum for end-users. The increasing number of wireless devices and standards strains the limited practical spectrum. Wireless operators are expected to need an additional 400 MHz of licensed bands by 2027, and the US is falling behind its peers in licensing those bands. Additional usable spectrum translates to increasing the number of jobs, connected homes to the internet, and the overall Gross Domestic Product (GDP). As a result, the scientific findings that will be carried out in this program targets mass-deployment if it in the cellular systems with minimal overhead and can boost spectral efficiency of cellular networks. The underlying technology that will be developed in this project can be commercialized either as a standalone device or as an intellectual property license. This Small Business Innovation Research (SBIR) Phase I project is a feasibility study for designing a wideband interference detection system on an integrated circuit. Wireless interference is a major hurdle in expanding the usable spectrum. As a result, real-time monitoring of the spectrum is essential for advancing technologies such as spectrum sharing, projected for 6G systems. Wideband spectrum monitoring, however, typically requires slow sweeping, power-hungry data converters, or advanced technologies not yet compatible with mass production. This project utilizes a non-resonant open transmission line structure that relies on the standing wave pattern to detect interference over several octaves of instantaneous bandwidth, within less than one microseconds, and consuming milliwatt-range of power. While the concept has been proven on a printed circuit boards, the goal of this project is to translate the design to on-chip technologies, and quantify the performance (Bandwidth, power, and response time) given the limitations of this implementation. The anticipated outcome of this work is a set of design recommendations that can deliver 1-16 GHz of instantaneous detection bandwidth within 1 milliwatt, for the chosen integrated circuit technology. This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.