Efficient Neuromorphic Processor Design for Autonomous Space Operation

It has been widely received that the recent success of artificial intelligence (AI) is built on three cornerstones: the advance of algorithms, the acquisition of big data, and the availability of high computing power. To further improve the data processing capability and efficiency, researchers, in general, explore from three orthogonal and complementary aspects: algorithm simplification and compression, computing architectures optimized for specific applications, and novel nano-devicesnbsp;that possess unique electrical properties, e.g., synapse- or neuro-alike behavior. These practices are respectively pursued by research societies of machine learning, computer architecture, and solid-state circuit and device. There lacks thorough and sufficient communications and coordination in between. As an example, the quantization of deep neural network (DNN) models often ignores the physical constraints on nano-devices like resistive memory (ReRAM, aka memristor), whose resistance suffers from different variation levels at different resistance values. The higher resistance level can also minimize the power consumption due to the reduced amplitude of the current participating in the computation.nbsp;Carefully optimizing the quantization scheme of DNNs can achieve both high computational robustness and low power consumption of the ReRAM-based neuromorphic processor.nbsp;nbsp;Therefore, the Nanomatronix and University of Arkansas team propose to develop key enabling techniques for designing an efficient and robust ReRAM-based neuromorphic processor at the circuit, architecture, and algorithm levels, and to explore systematic approaches of vertically integrating these techniques through interactive cross-layer optimizations.