Stacked Programmable Analog and Digital Electronic System (SPADES)

The use of broadband spectrometers is required for Earth-observing, planetary, and astrophysics missions.nbsp; Efficient use of these types of sensors require the need for high-speed analog-to-digital converters (ADC) in order to convert the analog information from these types of sensors to a digital format. The use of high-speed direct RF-sampling ADCs currently has the ability of directly sampling input frequencies up to and beyond 6.4 Giga samples per second (GSPS). Utilizing direct RF-sampling ADCs can drastically reduce componentry needs, weight and power versus typical limited bandwidth receivers using IF-sampling subsystems or heterodyne architectures.nbsp; Furthermore, direct sampling systems provide much greater bandwidth and versatility for scientific instrumentation, allowing the software to define functions which would otherwise be defined via a fixed hardware implementation.ISC seeks to innovate an interleaved ADC architecture by using multiple stacked die within a single package to provide next-generation sampling rates with ease-of-use for a range of applications such as radar, radiometry, spectrometer, and software-defined radio (SDR), which can take advantage of the ultra-wideband analog digitization to reduce front-end complexity by reducing down-conversion stages, intermediate frequency (IF) sampling subsystems, and other components that provide the system with reduced SWaP.nbsp; To improve interleaved ADC performance, reduce external componentry, reduce layout complexity, and provide excellent temperature and voltage matching of an interleaved ADC, ISC proposes a Stacked, Parallel, Analog-to-Digital, Electronic System (SPADES).nbsp; The stacking architecture can be applied to both commercial grade parts, achieving 20Gsps and beyond, as well as Space grade parts, achieving 12Gsps and beyond. Successful stacking of ADC chips can increase interleaving to achieve even higher rates.