Novel silicon based Photomultiplier Chip

Despite being heavily optimized for high operating temperature and high irradiation environments, silicon photomultipliers (SiPMs) fail miserably in both high irradiation and high temperature applications. The problem is a fundamental physics limitation of the underlying silicon. No processing tricks or shortcuts exist that can produce a significant improvement in the radiation tolerance of SiPMs. Radiation tolerance can only be achieved using a wide band gap semiconductor for the gain region. We propose a novel silicon based Photomultiplier Chip using a silicon absorbing region coupled to a novel, radiation tolerant, wide band gap gain region. The potential is to achieve quantum efficiency equivalent to the best available SiPMs while simultaneously suppressing dark count rates, enabling high temperature operation with low dark count rates, both pre- and post- irradiation. The approach is a high-risk / high-reward approach. We therefore propose to provide experimental demonstration of the validity of the approach in Phase I by demonstrating successful operation of the fundamental building block of the Photomultiplier Chip: the single photon avalanche diode (SPAD). In Phase II, arrays of these SPADs will be interconnected with monolithic quenching circuits to achieve large area Photomultiplier Chips and the devices will be characterized for radiation tolerance.