Monolithic Photonics for Next Generation High-Speed Links

Scaling of high-performance, many-core computing systems calls for radical approaches to provide ultra-energy-efficient and high-bandwidth-density interconnects at very low cost. Vertical-cavity surface-emitting laser (VCSEL) a promising solution because of its low latency, ultra-fast switching speed, high density, and relatively low energy consumption. State of art of the high-speed VCSEL can provide 50 Gbps with 100-200 fJ/bit. According to William Holt, head of Intel’s Technology and Manufacturing Group, all optical components after 2021 must require a power consumption of < 10 fJ/bit. A key component required for low power; dense interconnects is a high-speed, integrated modulator with small footprint to a VCSEL. Here a novel modulator array monolithically integrated with a 980 nm VCSEL so called transverse coupled cavity is proposed by Dr. Dalir from Optelligence LLC and Prof. Sorger from the George Washington University (University partner) to enrich the light-matter interaction in quantum wells (QWS). In phase 1, 980nm coupled cavity devices will be thoroughly investigated and integration with the driver IC under development for verification of functionality will be considered.  VCSEL and PIN arrays shall be coupled to the modules using ribbon wire bonding to simplify package development.  Table optics can be used to for initial characterization to eliminate the need for custom molded optics at this stage.  If operational, the module will be coupled one channel at a time and characterized for link budget, BER, optical eye opening, and energy per bit. In phase 2, bottom emitting coupled cavity 980nm VCSEL arrays with micro lensed output will be designed and fabricated using processes available in an outside VCSEL foundry.  This device configuration allows for a manufacturable low inductance die attach to the submount, as well as reduced mechanical alignment tolerance to fiber coupling optics.  Other approaches such as use of micro drilled holes in the submount are a fallback position if it later becomes clear that coupled cavity VCSELs are incompatible with backside emission or lens integration into the substrate. Second iterations of the drive IC and submount will be used in phase two, dependent on the results of phase 1.  Table optics will still be used in phase 2, allowing for full optical beam characterization of the VCSEL array and built in microlens configuration.  Phase 3 utilizes optical beam data from phase 2 for design of a molded plastic lens array.  In this iteration, additional laser drilled mechanical alignment features will be added to submount 3, likely requiring use of a multi-layer low temperature co-fired ceramic process. With use of the built in microlens, and ball bonding of the VCSEL array to the LTCC submount pads, our design goal will be manual assembly of the lens array based on mechanical alignment of features in the lens array with features built into submount 3.