SBIR/STTR Research Award

Implement 10B Related Radiation Hardening specification for all memory chips used in electronic systems for aircrafts

Award identifier f7fa8145dbe92647330c234cdcce845f7ec69960707eea5f66fb41538fd3e5a8Awarding agency Department of Defense · Air Force

Award amount

$149,800

Program and phase

STTR · Phase I

Award year

2021

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Award details

Awarding agency
Department of Defense
Branch
Air Force
Recipient company
CERIUM LABORATORIES LLC
Proposal award date
2020-12-03
Contract end date
2021-06-03
UEI
LG5MBHB8XL84
Solicitation number
X20.D
Topic code
AFX20D-TCSO1

Research abstract

Single Event Upsets (SEUs, also referred to as ‘bit flipping’) are unintended and unexpected changes to a computer’s memory. Such events have been blamed on in–flight termination of autopilot, automobiles being unable to stop accelerating, and incorrect fabrication of factory parts. The origin of SEUs can be in both software and hardware. This proposal will focus on hardware SEUs, which are often caused by cosmic ray showers. These high energy particles can switch the 0 or 1 state of a transistor. In the short term this manifests as a corruption of data. Repeated incidents cause microscopic ‘displacement damage’ which can render the device inoperable. The dominant particle causing SEUs at a given altitude is dependent on where a given particle species is created and how quickly it loses energy. Neutrons dominate radiation damage in the upper atmosphere. For memory chips which contain boron, a neutron can fission a 10B nucleus, creating two highly ionizing nuclei within the memory circuit. These two nuclei can rearrange charge (causing bit flips) and damage the atomic structure of the transistor. Cerium Labs has extensive experience in modifying memory chips to avoid neutron–induced SEUs. In this project we propose three phase approach to validate and ultimately create an 11B radiation hard memory chip supply chain. The three phases of our project are 1) measuring neutron induced SEUs aboard vital USAF systems, 2) re–manufacturing the relevant memory chips and confirming a lack of SEUs, and finally 3) submitting a report detailing suggested modifications to USAF vendor specifications and providing a supply chain for such radiation hard memory chips.

Technology keywords

Not reported

Other awards by this recipient

Verified by the same UEI. These are other public SBIR/STTR award pages, not a merged company record.

Awards with the same topic code

Verified by an exact topic code match. This is not a text-similarity match.

Research funding history

8 SBIR/STTR records share this UEI (2019–2024). Reported award amounts total $2,140,626. Reported amounts are not federal obligations.

Phases: Phase I, Phase II

Agencies: Department of Defense, Department of Energy

Agency intelligence

Department of Defense

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