SBIR/STTR Research Award
-200°C Rad hard Cold Capable Thermally multiplexed controller
Award amount
$149,951Program and phase
SBIR · Phase IAward year
2025Award details
- Awarding agency
- National Aeronautics and Space Administration
- Branch
- Not reported
- Recipient company
- Kouros Sariri
- Proposal award date
- 2025-09-30
- Contract end date
- 2026-03-27
- UEI
- QPEQE4XNKNM6
- Solicitation number
- SBIR 2025-I
- Topic code
- S13
Research abstract
Frequency Management International (FMI) proposes to deliver a conceptually validated feasibility study (in Phase 1) for a novel, Rad-hard Cold Capable Thermally multiplexed integrated controller (aka TMC) to discipline electronic components and sensors. The concept is adaptable to various components and it is a thermal stabilization engine.
In Phase 1 we will investigation to apply TMC to the design of a highly accurate cold capable and compact clock source with frequency stability in parts per billion (ppb) range when operating at temperatures as low as -200°C. TMC electronics (in the form of ASIC) includes coarse and fine temperature range detection as well as integrated PWM to steer the temperature to delivery the desired temperature stability. The two level thermal multiplexing is expected to provide 4 orders of magnitude accuracy improvement compared to a standalone and uncompensated clock. The miniaturized enclosure will be a breakthrough compared to any alternative that does not even offer cold capable and rad hard operation.
Upon sufficient investigation in phase 1, we will in phase 2 implement and fabricate the TCM and also a part-per-billion clock (PPBC). TMC design will be fabricated on semiconductor process with proven history and availability. Our design partner is University of Tennessee with a team working with Dr. Blalock.
The resonator in the stable clock will be designed based on our investigation of the very small form-factor packaged crystals that minimize power requirements for stabilization. The stable clock will be an efficient, low mass, low power, and agile. The design range PPBC offers scalable output frequency in the 20 to 120MHz range, superior output spectral purity (low jitter-low phase noise) and deliver ultra stable clock accuracy operating to -200°C for which there is no present component based alternative.
Technology keywords
Not reported
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