SBIR/STTR Research Award
Quantum Emulation Co-processor Circuit Card
Award amount
$239,956Program and phase
STTR · Phase IAward year
2020Award details
- Awarding agency
- Department of Defense
- Branch
- Navy
- Recipient company
- FASTER LOGIC, LLC
- Proposal award date
- 2020-06-08
- Contract end date
- 2021-11-11
- UEI
- LHM5GEWLRCJ7
- Solicitation number
- A
- Topic code
- N20A-T016
Research abstract
Whereas quantum computers stand to drastically transform computation for a number of existing and future problems, its realization in the near term produces certain challenges. Simulation and Emulation techniques make it possible to consider the advantages of quantum computation in real-world applications in cryptography, machine learning, signal processing, and cybersecurity. They also open the doors to learning. Just as we've seen classical systems used to teach quantum information concepts, we can -- and have -- reproduced coherent quantum states in classical analog electronics. This was a crucial step in our SDSU laboratory work, getting ready to build actual low temperature devices. Our advancement under STTR funding will be to interface these classical electronic circuits with digital logic, and in this case of the Navy proposal, to create a coprocessor architecture that works together with the more ubiquitous digital computer. Ours is a hybrid architecture, purposed to gain the advantages of historical "analog computing," while maintaining the flexibility of digital computing. In our lab, we have actively used the classical oscillator circuit as the qubit analog, successfully demonstrated quantum effects, and now see an innovation pathway to meet several needs: quantum computing emulation for its own benefit, emulation as a means to test quantum software (in development and prior to the availability of quantum computers), and lastly the innovation in the digital control logic which is useful for our emulation and will be doubly useful for low-temperature qubits as well.
Technology keywords
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