Scalable, Power Efficient, Programmable, Wide Dynamic Range, Multi-Field - Programmable-Array Compatible Readout Integrated Circuit for Infrared Range Applications

This proposal presents a plan to perform a technology demonstration of an advanced next generation readout integrated circuit (ROIC) to be used for low-power, compressive sensing, and high dynamic range (HDR) imaging applications. Once fabricated, the advanced ROIC will be hybridized with an InGaAs short wave infrared (SWIR) detector focal plane array (FPA) to demonstrate the ROICs capabilities in actual imaging scenarios. The HDR ROIC will provide a reconfigurable readout using adjustable per-pixel gain selection to allow on-the-fly wide dynamic range capability in a column-parallel analog to digital converter (ADC) readout architecture. This signal-level adaptable processing will utilize the ADC Full-Scale (FS) dynamic range across all signal levels using a Received Signal Strength Indicator (RSSI) during a ScenePreviewTM mode. During the design process, a rapid ROIC design framework to compile scalable ROIC designs through the ROICompilerTM platform will be developed. This development will expand on the Berkeley Analog Generator foundation and produce a customized set of generators and ROIC specific application programing interface (API), ROICompilerTM.