Development of High Gain SiGeC CMOS Imaging Arrays for Visible Sensing

This project will study experimentally and theoretically SiGeC photo-diodes with a novel internal gain mechanism that is not avalanche by impact ionization. The new gain mechanism has been shown to be noiseless and operates at low voltage, which makes it compatible with standard CMOS devices and circuits. The new internal gain in the SiGeC photo-diodes, coupled with suitable circuitry, will enable extremely high sensitivity to low light levels, including near single-photon detection and counting capability. The goal is to develop a complete understanding of the factors that produce, impact, and control the gain, such that it can be modeled and easily used in the engineering of photo-diodes and other types of electronic and opto-electronic devices. With the understanding of these factors, it will be possible to fabricate image sensors with large 2D arrays of pixels. The SiGeC photo-diodes will be fabricated at a 200mm wafer CMOS foundry, located in the continental U.S. suitable for DoD applications.