Embedded Class Secure Processor

A recent report from the Defense Science Board on cyber deterrence states that we have only seen the “virtual tip of the cyberattack iceberg.” This report warns that for at least the next 5-10 years, other nations will have offensive cyber capabilities that “far exceed the United States’ ability to defend and adequately strengthen the resilience of its critical infrastructures” and will use cyber to hold U.S. critical infrastructure at risk by targeting of inherently vulnerable industrial control systems (ICS).” Recent cyber-attacks including STUXNET [3], Ukraine power grid [4], Israel power grid [5], and the Kemuri Water Company [6] hacks have shown that cyber equipped adversaries are actively targeting industrial control infrastructure to achieve their goals. The current approach in critical infrastructure security is insufficient to address nation state adversaries. The industry is focused on perimeter defense, firewalls, and anti-virus solutions found in enterprise information technology (IT) techniques. Most of which are at best “Band-Aids” and do not address the vulnerable mechanisms in computer hardware and software. In this Phase I Small Business Innovative Research (SBIR) effort, the proposer will research, develop, and demonstrate a novel secure processor architecture designed to address the inherent vulnerabilities in modern computer processors. This project will break the trend in playing cat and mouse with response based cyber security tactics.