Efficient Arrays for Generating Light Emission (EAGLE)

With today's IRLED devices, >99.4% of input electrical power is converted into parasitic/waste heat. Moreover, as the local temperatures of the pixels increase due to the generated heat, IRLED optical efficiency is further reduced. Overall this severely limits the number and intensity of array pixels that can be simultaneously operated at high apparent temperatures. In Phase 2, we focus on developing two technologies that will improve performance of IRLED arrays. On the IRLED technology side, we will improve wall-plug efficiency using lenslets and textured surfaces. On the RIIC technology side, we will develop 24-micron pixel circuits that add additional drive gears to take advantage of improved IRLED devices. Our RIIC test chips will be fabricated using advanced 0.18-micron CMOS process - an improvement over 0.5-micron CMOS process used in our ongoing IRLED projector programs. On the array front, we will fabricate 1Kx1K MWIR arrays with 24-micron pixels using residual RIIC die from NSLEDS and newly fabricated improved efficiency IRLED arrays. On the systems front, we will evaluate improved array performance using NSLEDS-class projector. If this project is successful, its technology will be quickly transitioned to our ongoing IRLED projector programs (HDILED and EIRE).