SBIR/STTR Research Award
Advanced RIIC Technology to Increase Density and Efficiency of IRLED Arrays (ART-IDEA)
Award amount
$150,000Program and phase
SBIR · Phase IAward year
2017Award details
- Awarding agency
- Department of Defense
- Branch
- Air Force
- Recipient company
- Chip Design Systems Inc.
- Proposal award date
- 2017-08-08
- Contract end date
- 2018-08-05
- UEI
- PN31T8TQRHX3
- Solicitation number
- 2017.1
- Topic code
- AF171-015
Research abstract
We propose to study how extraction efficiency can be improved by reducing IRLED pixel pitch. Our approach is to scale the size of RIIC pixel and IRLED device from 24-microns down to 12-microns and to lower the IRLED drive voltage from 10 Volts to 5 Volts.
Technology keywords
Not reported
Other awards by this recipient
Verified by the same UEI. These are other public SBIR/STTR award pages, not a merged company record.
- Advanced Superlattice LED System (ASLEDS)
- TSLEDS Scene Projector Electronics
- Next-Gen Infrared Scene Projector for Hypersonic Hardware-in-the-loop Test and Evaluation (ASLEDS)
- High Fidelity IR Clutter Generator for Missile Warning Sensors (HSLEDS)
- Next Generation Infrared Scene Projector for Testing MWIR Systems
Awards with the same topic code
Verified by an exact topic code match. This is not a text-similarity match.
Research funding history
15 SBIR/STTR records share this UEI (2013–2023). Reported award amounts total $8,933,982. Reported amounts are not federal obligations.
Phases: Phase I, Phase II
Agencies: Department of Defense