SBIR/STTR Research Award

Hardware Open System Technologies (HOST) Prototype Development

Award identifier c80bc9a94eca67b04314c6c41002fe64b3d32955fdd5ffbc93e2fda7ca37fedaAwarding agency Department of Defense · Navy

Award amount

$154,941

Program and phase

SBIR · Phase I

Award year

2016

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Award details

Awarding agency
Department of Defense
Branch
Navy
Recipient company
CROSSFIELD TECHNOLOGY LLC
Proposal award date
2016-09-30
Contract end date
2018-02-12
UEI
EE2BD1HMA748
Solicitation number
2016.2
Topic code
N162-089

Research abstract

Crossfield Technology LLC proposes to develop an innovative implementation of HOST hardware that incorporates HOST-defined 6U electrical profiles and interfaces with the addition of an electrical and optical System Communications Transmission Interface (SCTI) in the Data Plane. To implement this architecture, Crossfield will develop HOST payload modules, a HOST switch module, a HOST Power Supply Module (PSM), and an ultra-high-speed backplane with VITA 66/67 support in the P5/P6 positions. The payload modules include a Field Programmable Gate Array (FPGA) System-on-Chip (SoC) with VITA 57.4 FPGA Mezzanine Card Plus (FMC+) slots and a Nonvolatile Memory Express (NVMe) Solid State Disk (SSD) that will be revised to support the HOST specified interfaces and protocols (HOST-SS).

Technology keywords

Not reported

Other awards by this recipient

Verified by the same UEI. These are other public SBIR/STTR award pages, not a merged company record.

Awards with the same topic code

Verified by an exact topic code match. This is not a text-similarity match.

Research funding history

38 SBIR/STTR records share this UEI (2004–2021). Reported award amounts total $16,910,245. Reported amounts are not federal obligations.

Phases: Phase I, Phase II

Agencies: Department of Defense, Department of Energy, National Aeronautics and Space Administration

Agency intelligence

Department of Defense

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