SBIR/STTR Research Award

Hybrid Analog-Digital Co-Processor for Scientific Computation

Award identifier 353e70483ddcbad14c09df31cf95c753650d11560e2f9e3cbbe5ab8bffdbec05Awarding agency Department of Defense · Defense Advanced Research Projects Agency

Award amount

$149,918

Program and phase

SBIR · Phase I

Award year

2016

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Award details

Awarding agency
Department of Defense
Branch
Defense Advanced Research Projects Agency
Recipient company
ALLEGORY LABS LLC
Proposal award date
2016-05-04
Contract end date
2017-02-17
UEI
Not reported
Solicitation number
2015.0
Topic code
ST15C-002

Research abstract

We propose to use a hybrid analog-digital electronic computer to solve partial differential equations (PDEs) arising in scientific simulations and high performance computing (HPC). The simulation of PDEs has extensive applications in commerce, research, and defense. Analog computation potentially decreases the time and energy needed to reach a solution by providing an ability to carry out iterative numerical methods in parallel, and with an infinitesimal time step. Specifically, we investigate the scalability of using analog techniques to accelerate solving elliptic PDEs using multigrid algorithms defined on structured grids. This proposal will evaluate whether speeding up the solution of elliptic PDEs and other numerical kernels would significantly improve overall HPC application speed and efficiency. Any proven improvement in computing hardware and software for these problems, in terms of solution time, energy needed to reach a solution, reliability of obtaining a solution, or generality of the problems that can be solved, would have widespread benefits in understanding of systems modeled using PDEs.

Technology keywords

Not reported

Awards with the same topic code

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Agency intelligence

Department of Defense

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