Analog Co-Processors for Complex System Simulation and Design
Award amount
$154,047Program and phase
STTR · Phase IAward year
2016Award details
- Awarding agency
- Department of Defense
- Branch
- Defense Advanced Research Projects Agency
- Recipient company
- ARETE ASSOCIATES
- Proposal award date
- 2016-03-21
- Contract end date
- 2017-01-20
- UEI
- DMKEXJ8NQ4C5
- Solicitation number
- 2015.0
- Topic code
- ST15C-002
Research abstract
Technology keywords
Not reported
Other awards by this recipient
Verified by the same UEI. These are other public SBIR/STTR award pages, not a merged company record.
- Next Generation Mine Architecture Reachback
- UUV Data Transformation Tool
- NSAM Multi-Sensor Fusion
- Passive Sensing for Distributed Radars
- Dual-Purpose Laser Range Finder and Lidar Sensor
Awards with the same topic code
Verified by an exact topic code match. This is not a text-similarity match.
- Memristor-CMOS Analog Co-Processor for Efficient Computation of PDEs
- Analog Co-Processors for Complex System Simulation and Design
- Memristor-CMOS Analog Co-Processor for Efficient Computation of PDEs
- Analog Co-Processors for Complex System Simulation and Design
- Ultra-Low Power Physical Based Computation for Tactical Algorithm Design and Implementation
Research funding history
417 SBIR/STTR records share this UEI (1994–2025). Reported award amounts total $220,044,517. Reported amounts are not federal obligations.
Phases: Phase I, Phase II, Phase II – Direct to Phase II
Agencies: Department of Defense, Department of Commerce, Department of Energy, Department of Health and Human Services, National Science Foundation, Department of Homeland Security
Contractor profile
Historical federal award activity, when published, is on that contractor profile. Matched by UEI only.
Agency intelligence
NAICS intelligence
This classification comes from the contractor profile, not from the SBIR award record.