SBIR/STTR Research Award

Next Generation Rad Hard Reduced Instruction Set Computer

Award identifier ade8493afc9d2e9f097235b819e216af89007f63f64d7f8a100041c8dd73d7b9Awarding agency Department of Defense · Air Force

Award amount

$869,735

Program and phase

SBIR · Phase II

Award year

2016

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Award details

Awarding agency
Department of Defense
Branch
Air Force
Recipient company
IDEAS ENGINEERING & TECHNOLOGY, LLC
Proposal award date
2016-03-16
Contract end date
2019-04-30
UEI
VUMHFJQ2HF69
Solicitation number
2014.1
Topic code
AF141-097

Research abstract

ABSTRACT:Radiation hardened microelectronics is a continuing requirement for DoD and commercial spacecraft. The generational gap between commercial devices and space rated devices keeps widening due to ever increasing qualification costs and complexities inherent in smaller geometries and advanced processes. Radiation hardened computing capability is an even harder problem due to the constraints imposed by current spacecraft systems requirements. On-board computing is increasingly desirable due to payload heterogeneity and increasing amounts of data produced by payloads and sensors.To address this opportunity, IDEAS-TEK will use a low cost ASIC flow in Phase 2 to build the 32-bit RISC designed in Phase 1 in a radiation hardened integrated circuit (IC). The ICs main radiation hardened features are: Immunity to destructive latchup, total ionizing dose tolerance > 300 Mrad (Si) up to 1 Mrad (Si), Single Event Effect (SEE) immunity to 60 MeV and operating temperature range from -55 C to +125 C.The objective of the program is two fold: 1)To build a trusted, radiation hardened 32-bit RISC processor and 2) to demonstrate a cheap path to build trusted, radiation hardened digital ICsBENEFIT:The programs main benefits will be the demonstration of an inexpensive, publicly available path to develop trusted radiation hardened digital ICs and the creation of an inexpensive radiation hardened 32-bit RISC ASIC that can be identically replicated on programmable logic devices.Both benefits address current AFRL - and the aerospace community in general - needs.The program will boost the radiation hardened IC market by allowing different design teams to generate new designs by either using open source components and libraries or licensing it from publicly available sources.Both goals of the program have their main commercial applications in the civil and military aerospace markets.The RISC processor can be used as a reliable computing engine while the inexpensive path to trusted radiation hardened silicon can be use to design and implement digital and mixed signal ICs to fulfil different mission profiles.Additionally the RISC processor can be used in nuclear applications, while its embodiment in other hardware platforms (e.g FPGAs) can be used in fault tolerant applications (automotive, medical) where reliability is a priority.

Technology keywords

Not reported

Other awards by this recipient

Verified by the same UEI. These are other public SBIR/STTR award pages, not a merged company record.

Awards with the same topic code

Verified by an exact topic code match. This is not a text-similarity match.

Research funding history

9 SBIR/STTR records share this UEI (2014–2021). Reported award amounts total $5,460,203. Reported amounts are not federal obligations.

Phases: Phase II, Phase I

Agencies: Department of Defense

Agency intelligence

Department of Defense

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