Low Power Multi-Channel RF and Digital GPS Anti-Jam ASIC

ABSTRACT:There are numerous military applications where incorporation of Anti-Jam (AJ) GPS technology has been constrained by Size Weight and Power (SWaP), including handheld systems, unmanned aerial or ground vehicles, and munitions/weapons.The essential elements for incorporating AJ capability into GPS receivers are multi-channel RF front end down conversion, analog to digital conversion (ADC), and digital AJ processing.The goal of this program is to integrate multi-channel RF front-end and Digital AJ processing circuitry onto a single ASIC and interface this device with next generation military GPS receivers.RBS Technologies has formulated a Phase II effort that will develop and demonstrate a prototype Low Power Multi-Channel RF and Digital GPS Anti-Jam ASIC that meet the following performance goals: 1) be compatible with state of the art L1/L2 GPS modernized SWaP constrained receiver technology,2) be capable of accepting simultaneously L1 and L2 RF inputs from a 4-element (minimum 2-element) CRPA , 3) provide at least 30 dB of anti-jam protection for up to (N-1) wide band Gaussian noise interference sources where N is the number of CRPA elements, 4 )successfully pass GPS M-code signals that can be used by modernized GPS receivers for navigation, 5) consume a total power of1 Watt or less.BENEFIT:The development of microelectronic chip anti-jam GPS processing that will reduce size, weight, and power by a factor of ten has a very large marketfor resource constrained military applications, which include handheld systems, unmanned aerial or ground vehicles, and munitions/weapons.In addition, there is significant potential market for civilian law enforcement and homeland security.The microelectronic chip implementation will also be a candidate for replacing current technology where size and power is not a constraint because of lower cost and increased reliability.