Advanced Processing Electronics DRFM

Abstract: The goal of this SBIR effort is to provide the next evolution in broadband Digital RF Memory (DRFM) based products. This includes providing extremely wide instantaneous frequency bandwidths, improving spurious performance, increasing false target outputs, cost savings, use of COTS technology for affordability and a reduction in delicate RF electronics that reduce MTBF. This program leverages and complements SPEC"s current commercialized Agile Digital Effects Processor (ADEP) product lines and provides EW system hardware-in-the-loop capabilities for simulators, range support, and air, ground and naval EW operations. The proposed approach provides the following key benefits: Full 6 GHz instantaneous bandwidth using 100% COTS technology Proven ADEP DRFM algorithms and processing technology Digital filter compensation for ADC and DAC phase and amplitude inconsistencies Digital notch or band pass filters ahead of PRI trackers for improved performance Externally controllable and programmable techniques generation Options for dual 3.5 GHz or quad 1.5 GHz processing capability Accommodates existing DRFM form factor