High-Speed, High-Fidelity, Reprogrammable Kernel for Use in Digital Radio Frequency Memory (DRFM) Systems and High-Speed Signal Digitization and Proce

Digital Radio Frequency Memory (DRFM) systems apply active RF deception by digitizing a received signal and storing a coherent copy in memory that is delayed and retransmitted (in possibly altered form). As digital electronics signal conversion, generation, and processing technologies advance, radar and DRFM designs are increasingly implemented in software/firmware using Field Programmable Gate Arrays (FPGAs) that, with high dynamic range RF frequency Analog-to-Digital Converters (ADCs) and Digital-to-Analog Converters (DACs), support rapid advances in radar waveforms and DRFM countermeasures. In a Phase I SBIR effort, Trident Systems implemented and demonstrated a fully digital programmable RF kernel that met or exceeded almost all targeted performance metrics, and developed a design for a fully functional high-performance RF kernel suitable for laboratory, field test, or operational use in DRFM, radar, and EW applications. In Phase II of this effort, Trident proposes to complete the development of this RF kernel design, along with supporting software for configuration and programming, and demonstrate & deliver a form-factor multi-channel prototype system.