SBIR/STTR Research Award

Scalable Parallel Algorithms for Formal Verification of Software

Award identifier d89ed2beb27b09d122e3cdd13622fe8f4434f6c9d895724c7170be566f08b17eAwarding agency National Aeronautics and Space Administration

Award amount

$125,000

Program and phase

SBIR · Phase I

Award year

2013

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Award details

Awarding agency
National Aeronautics and Space Administration
Branch
Not reported
Recipient company
ARIES DESIGN AUTOMATION, LLC
Proposal award date
2013-05-23
Contract end date
2013-11-23
UEI
KHN1ZN6ALMV4
Solicitation number
Not reported
Topic code
A1.06

Research abstract

We will develop an efficient Graphics Processing Unit (GPU) based parallel Binary Decision Diagram (BDD) software package, and will also combine it with our GPU-based parallel SAT solver that we are currently developing in a NASA SBIR Phase II project in order to solve much larger and more complex Boolean formulas from formal verification than possible with either method alone. BDDs are a data structure that satisfies some simple restrictions, resulting in a unique representation of a Boolean function regardless of its actual implementation. This property of BDDs allows the efficient solution of many problems. The proposed tool will exploit multi-core CPUs and the thousands of stream cores in the latest GPUs, which were made accessible to programmers through specialized software development kits. These large numbers of stream cores in GPUs, and the possibility to execute non-graphics computations on them, open unprecedented levels of parallelism at a very low cost. In the last 8 years, GPUs had an increasing performance advantage of an order of magnitude relative to x86 CPUs. Furthermore, this performance advantage will continue to increase in the next 20 years because of the scalability of the chip manufacturing processes. The technical objectives will be to efficiently exploit the GPU parallelism in order to accelerate the execution of our prototype GPU-based parallel BDD package, and to implement hybrid approaches combining it with our GPU-based parallel SAT solver. BDDs and SAT solvers are orthogonal methods with different advantages, and a hybrid of the two will significantly increase both the speed and capacity when formally verifying complex software for space missions. We achieved at least 2 orders of magnitude speedup with our prototype GPU-based parallel BDD package in a previous Phase I, and expect to achieve at least 4 orders of magnitude speedup with our hybrid BDD-SAT tool by the end of Phase II, compared to the current state of the art.

Technology keywords

Not reported

Other awards by this recipient

Verified by the same UEI. These are other public SBIR/STTR award pages, not a merged company record.

Awards with the same topic code

Verified by an exact topic code match. This is not a text-similarity match.

Research funding history

19 SBIR/STTR records share this UEI (2006–2022). Reported award amounts total $4,465,000. Reported amounts are not federal obligations.

Phases: Phase I, Phase II, Phase II – Direct to Phase II

Agencies: National Aeronautics and Space Administration, Department of Defense, Department of Energy, National Science Foundation, Department of Commerce

Agency intelligence

National Aeronautics and Space Administration

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