EM Emanation Reduction Technique for FPGAs

Electromagnetic emanations represent a significant potential vector of attack for FPGA designs carrying critical program information or other sensitive data or algorithms. The effort proposed here will implement and study a technique designed to dramatically limit the EM emanations from FPGAs, via a methodology that will not functionally alter target designs, and naturally lends itself to seamless integration with other anti-reverse engineering techniques, allowing for strong, multifaceted protection of critical data. The proposed technique accomplishes EM emanation reduction by using a special layout and routing methodology, for designs on standard COTS FPGAs, that nullifies EM emanations.