FPGA Low Power Design Rules

Irvine Sensors Corporation (ISC) and the University of Southern California (USC) plan to develop a semi-automatic framework for designing energy-efficient applications on FPGA. The framework utilizes the “domain-specific modeling technique” to rapidly estimate and optimize the power consumption of circuit designs on FPGA. Major components of the framework include (1) a domain modeling front-end, (2) a set of domain-specific design rules for energy-efficient designs, (3) an extensible and reusable database of low-level component power functions, and (4) a plug-in interface for interacting with existing FPGA design tools. The findings from Phase I will be used in the design of the Phase II prototype.