SBIR/STTR Research Award

An Efficient Parallel SAT Solver Exploiting Multi-Core Environments

Award identifier 985089d055992c480f831cabe3b3d7b72668e44995143c1e5c42b384f9e9d209Awarding agency National Aeronautics and Space Administration

Award amount

$600,000

Program and phase

SBIR · Phase II

Award year

2010

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Award details

Awarding agency
National Aeronautics and Space Administration
Branch
Not reported
Recipient company
ARIES DESIGN AUTOMATION, LLC
Proposal award date
2010-03-29
Contract end date
2014-08-31
UEI
KHN1ZN6ALMV4
Solicitation number
Not reported
Topic code
X1.02

Research abstract

The hundreds of stream cores in the latest graphics processors (GPUs), and the possibility to execute non-graphics computations on them, open unprecedented levels of parallelism at a very low cost. In the last 6 years, GPUs had an increasing performance advantage of an order of magnitude relative to x86 CPUs. Furthermore, this performance advantage will continue to increase in the next 20 years because of the scalability of the chip manufacturing processes. The goal of this project is to efficiently exploit the GPU parallelism in order to accelerate the execution of a Boolean Satisfiability (SAT) solver. SAT has a wide range of applications, including formal verification and testing of software and hardware, scheduling and planning, cryptanalysis, and detection of security vulnerabilities and malicious intent in software. We bring a tremendous expertise in SAT solving, formal verification, and solving of Constraint Satisfaction Problems (CSPs) by efficient translation to SAT. In our previous work (done on the expenses of our company) we achieved 2 orders of magnitude speedup in solving Boolean formulas from formal verification of complex pipelined microprocessors, 4 orders of magnitude speedup in SAT-based solving of CSPs, and 8 orders of magnitude speedup in SAT-based routing of optical networks. During Phase 1 we implemented a prototype of a parallel GPU-based SAT solver that is 1?2 orders of magnitude faster than the best sequential SAT solvers. In Phase 2, we will continue to exploit the GPU parallelism to accelerate SAT solving, and expect to achieve speedup of 3?4 orders of magnitude.

Technology keywords

Not reported

Other awards by this recipient

Verified by the same UEI. These are other public SBIR/STTR award pages, not a merged company record.

Awards with the same topic code

Verified by an exact topic code match. This is not a text-similarity match.

Research funding history

19 SBIR/STTR records share this UEI (2006–2022). Reported award amounts total $4,465,000. Reported amounts are not federal obligations.

Phases: Phase I, Phase II, Phase II – Direct to Phase II

Agencies: National Aeronautics and Space Administration, Department of Defense, Department of Energy, National Science Foundation, Department of Commerce

Agency intelligence

National Aeronautics and Space Administration

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