Multi-Modulator Architecture for High Sensitivity High Dynamic Range Analog to Digital Converter (ADC)

Higher receiver sensitivity enables detection of weaker signals, which translates into increased signal-to-noise ratio and increased coverage area. HYPRES, in collaboration with Stony Brook University, proposes to deliver high sensitivity over a wide frequency band using superconductor high-linearity analog-to-digital converter (ADC) technology. First, operating at 4 K, the ADC offers a much lower thermal noise floor. Second, direct digitization eliminates non-linear analog RF components which raise the effective noise floor. Finally, we propose a multi-modulator architecture that further increases signal-to-noise ratio. In Phase I, we will start with the low risk approach of designing, fabricating, and testing a high sensitivity input transformer to our proven phase-modulation-demodulation (PMD) ADC with a lower secondary inductance to reduce the noise floor. This approach will meet the required -90 dBm sensitivity for the 30-MHz HF band. Next, we will extend the same sensitivity performance over a wider (500 MHz) bandwidth by using multiple modulators and on-chip circuitry for digital summing and filtering circuitry. We will characterize the performance of the ADC, and its noise floor, by simulating the multi-modulator ADC using MATLAB Simulink, also including the model for the designed transformer.