Embeddable Software Programmable Radio

The goal of this project is to produce a cost-efficient Software Defined Radio (SDR) chipset, composed of commercially available components, which can take advantage of the JTRS Software Communications Architecture (SCA) and software waveform library. While low cost RF and signal processing components for SDRs are becoming readily available, a major driver for the size, weight, power and cost of a military SDR is the security device needed for the SDR to handle classified waveforms. The major focus of this effort will be to develop a low cost, single-chip security device that uses verifiable partitioning methods to prevent intermingling of differently classified information. Under Phase I of this effort, NAVSYS developed a design for a Mini-SDR that uses COTS components and a partitioned design on a single chip security device to perform the red, black and crypto processing required for running a JTRS waveform. Under the proposed Phase II effort NAVSYS will implement the Phase I single chip encryption design and perform an end-to-end digital demonstration. Under the proposed Phase II option, a prototype waveform will be implemented to support an end-to-end RF test. The military SDR chipset developed under this effort will be capable of being embedded in unitary computing, display and position location devices envisioned for future Marine Corps ground forces.