Spectrum Monitoring and Awareness in Real-Time (SMART)

BANC3’s proposed solution for SMART features a software defined spectrum monitoring system instantiated on an Intel Direct RF Agilex 9 Field Programmable Gate Array.  This flexible and scalable architecture implements a Machine Learning (ML) signal classifier that will recognize communication signal types and interfaces to the Android Tactical Assault Kit (ATAK) tablet. The unit will be packaged in the AN/PRC-117(G) radio, minimizing the impact on the dismounted soldier’s deployable equipment.  The ATAK plug-in will be carefully designed to manage cognitive workload while taking into consideration that the end users do not have specialized training in RF signals analysis.  The signal classifier incorporates a high-speed ADC (up to 64 GSPS).  A novel software defined receiver (SDRX), developed by BANC3, is used as a preprocessor to create both spectra and pulse descriptor word (PDW) data. A Deep Learning Accelerator including a Convolution Neural Network (CNN) for Machine Learning (ML) signal type recognition operates on the spectra and PDW data to assess signal classes.  The CNN is developed using the Intel FPGA AI Suite, allowing real-time operation in the FPGA.  An interface to external onboard high-speed memory (DDR4) provides storage resources for the CNN and Hard Processor System (HPS).  A signal classifier app running on the embedded HPS exchanges data with the ATAK tablet. Software plug-ins for the ATAK end user device allow RF spectrum monitoring data and recognized signal types to be presented to the user as overlays on the digital map displays.  While our SMART configuration is initially focused on communications signals (20-2000 MHz) in support of dismounted tactical unit operations, the underlying hardware is scalable to intercept and process RF signals over a much wider range, up to 36 GHz.  The ML based signal classifier is adaptable to many different signal classes including radar signals and interference/jamming detection. These attributes provide a credible path for transitioning the SMART product to other defense missions on multiple platforms as well as to non-defense Government and commercial applications. Our objectives on Phase I include developing a detailed design of the SMART system architecture, prototyping the signal classifier on FPGA development kits in the lab, developing a demonstration using multiple signal types, and assessing the performance of the signal classifier used in the demonstration.