Hardened by Design Cryogenic Infrared Focal Plane Array Readout Integrated Circuit

We have developed transistor level radiation tolerant design techniques for the manufacture of radiation resistant digital and mixed signal devices, including infrared (IR) focal plane array (FPA) readout integrated circuits (ROICs), and verified the operation and radiation performance to 43K (-230°C). We have achieved designs that exhibit significant hardness (i.e., very little change in the transistor characteristics) when irradiated to 1Mrad(Si) at 43K. These basic transistor elements were fabricated in a 180nm technology node and can be used for the design, manufacture and production of IRFPAs for spaceborne applications. Further, our design enhancements can easily be scaled to more advanced nodes (130nm and below for high-density ROICs). For maintaining higher-voltage compatibility, the radiation tolerant design techniques can be “reverse scaled” to larger line-width technologies and higher voltage levels (limited only by the available fabrication processes). Our design team has extensive experience in using hardness-by-design techniques (20+ years) to achieve TID, singe event effects (SEE) and prompt dose hardness levels from strategic (military environments) to radiation tolerance for lower cost spaceborne applications. By optimizing and expanding our design techniques, we can maintain our demonstrated radiation hardness, even when analog mixed signal devices are irradiated in a cryogenic environment.