SBIR/STTR Research Award

Monitoring Reliability of Electronics Via Power-Up Signature

Award identifier 83a314f108237316de9a8ebd675be2d984b723bdfc8d97b5349416e3e5657440Awarding agency Department of Defense · Navy

Award amount

$69,986

Program and phase

SBIR · Phase I

Award year

2006

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Award details

Awarding agency
Department of Defense
Branch
Navy
Recipient company
STRESSTEST
Proposal award date
2006-05-01
Contract end date
2006-11-01
UEI
Not reported
Solicitation number
2006.1
Topic code
N06-006

Research abstract

Reliability problems in contemporary integrated circuits can occur in the field for a variety of reasons: latent defect activation, long-term exposure to radiation, electro migration, etc. Field failures result in incorrect operation during mission critical activities and may lead to loss of life and property. The ability to identify degenerate devices will help to minimize the associated expense of a field failure. Moreover, the ability to detect devices prior to decline will also allow for the timely replacement of soon-to-fail components and consequently avoid any system damage or unexpected downtime. This proposal describes a course of research, which would investigate the early identification of degenerate devices (possibly prior to "wear out") by monitoring the power supply current during power-up - in essence performing health monitoring of integrated circuits in a novel and inexpensive manner. BENEFITS: The two commercial outcomes of this research are expected to be 1) an on-chip circuit, which can be added to any chip and 2) a stand-alone chip that can be added to any board - in both cases to monitor the health of the electronic system.

Technology keywords

Not reported

Awards with the same topic code

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Agency intelligence

Department of Defense

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