SBIR/STTR Research Award
Monitoring Reliability of Electronics Via Power-Up Signature
Award amount
$69,986Program and phase
SBIR · Phase IAward year
2006Award details
- Awarding agency
- Department of Defense
- Branch
- Navy
- Recipient company
- STRESSTEST
- Proposal award date
- 2006-05-01
- Contract end date
- 2006-11-01
- UEI
- Not reported
- Solicitation number
- 2006.1
- Topic code
- N06-006
Research abstract
Reliability problems in contemporary integrated circuits can occur in the field for a variety of reasons: latent defect activation, long-term exposure to radiation, electro migration, etc. Field failures result in incorrect operation during mission critical activities and may lead to loss of life and property. The ability to identify degenerate devices will help to minimize the associated expense of a field failure. Moreover, the ability to detect devices prior to decline will also allow for the timely replacement of soon-to-fail components and consequently avoid any system damage or unexpected downtime. This proposal describes a course of research, which would investigate the early identification of degenerate devices (possibly prior to "wear out") by monitoring the power supply current during power-up - in essence performing health monitoring of integrated circuits in a novel and inexpensive manner. BENEFITS: The two commercial outcomes of this research are expected to be 1) an on-chip circuit, which can be added to any chip and 2) a stand-alone chip that can be added to any board - in both cases to monitor the health of the electronic system.
Technology keywords
Not reported
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