Digital Array Analog to Digital Converter

Airborne communication platforms utilize multi-beam phased arrays to support multiple satellite links, resulting in higher data rates by digitally combining multiple sub-array modules. The use of digital array ADCs is required to facilitate signal-processing techniques to suppress interference and to allow multiple links. Commercial ADC devices are unable to meet the desired requirements. A state of the art ADC architecture must be developed to achieve the best performance/cost ratio. In Phase I, a basis for an EHF Receiver with an IF Band Pass ADC and a digital I/Q mixer was established. An innovative PTIBP ADC architecture based on Nyquist rate and undersampling techniques was conceptualized. A key component of this architecture is a unique PLP ADC that receives IF input signals in the range of 300 MHz to 1300 MHz and generates 12-bit outputs. The performance of the architecture has been confirmed with Matlab and a schematic design for a 12-bit PLP ADC has been completed using TSMC 0.18 um technology and successfully simulated using Cadence tools. In Phase II, a complete PTIBP ADC prototype with four PLP ADCs time interleaved on a single chip will be designed, fabricated, and tested to fulfill the needs of future airborne communication platforms.