SBIR/STTR Research Award

Performance Improvement of a Receiver on a Chip (ROC)

Award identifier 5c18dd59271b4d0d66144aadcae00e84d7be2f1acba6f2efd8e2451e55f79a33Awarding agency Department of Defense · Air Force

Award amount

$100,000

Program and phase

SBIR · Phase I

Award year

2005

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Award details

Awarding agency
Department of Defense
Branch
Air Force
Recipient company
CPU TECHNOLOGY, INC.
Proposal award date
2005-03-18
Contract end date
2005-12-18
UEI
Not reported
Solicitation number
2005.1
Topic code
AF05-225

Research abstract

CPU Tech will develop algorithms for efficient signal processing for Receiver-on-a-Chip. The marriage of these technologies is possible in the desirable form factor through deep sub-micron development. The application at hand demands signal processing algorithms and system level development tools in addition to this technology. This approach, supported by advanced model generation will accurately illustrate the effectiveness of the proposed algorithms. This detailed level of support capitalizes on the extensive signal processing background of CPU Tech. Our staff has been involved in similar algorithm processing developments in the past, thus we are confident that the nature of this development will yield a highly effective solution that can be readily implemented in the desired form factor. This confidence is based upon our powerful "System Level Development Tool Suite," SystemLab (TM). CPU Tech has repeatedly demonstrated the ability to turn algorithms into physical solutions for multiple programs; this application adds the front-end sensor and related algorithms, with algorithms requiring variable parameters associated with the "signals of interest." Our staff has developed signal processing algorithms over multiple systems for the past 3-4 decades; that experience will pay signficant dividends in this application.

Technology keywords

Not reported

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Agency intelligence

Department of Defense

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