Component-Oriented Operating Logic for FPGAs (COOL FPGA)
Award amount
$79,985Program and phase
SBIR · Phase IAward year
2004Award details
- Awarding agency
- Department of Defense
- Branch
- Navy
- Recipient company
- SYSTRAN FEDERAL CORP.
- Proposal award date
- 2004-11-22
- Contract end date
- 2005-05-22
- UEI
- KN47KKNMWKQ9
- Solicitation number
- 2004.3
- Topic code
- N04-244
Research abstract
Technology keywords
Not reported
Other awards by this recipient
Verified by the same UEI. These are other public SBIR/STTR award pages, not a merged company record.
- Intrusion Sensitive Material
- AT Sensors for IC Use
- FN Composites
- Advanced Flexible Architecture for UWB Receivers
Awards with the same topic code
Verified by an exact topic code match. This is not a text-similarity match.
- SystemC Environment for FPGA Design, Verification and Transparent Technology Update/Upgrade
- Abstraction Layer for Advanced Reconfigurable Computing
Research funding history
105 SBIR/STTR records share this UEI (1983–2008). Reported award amounts total $24,877,169. Reported amounts are not federal obligations.
Phases: Phase I, Phase II
Agencies: Department of Defense, Department of Commerce, National Aeronautics and Space Administration, Department of Energy, National Science Foundation