AN/SLQ-32 IFM/CFR upgrade

We present several methods for upgrading the AN/SLQ-32 IFM/CFR that are applicable to the subject of the solicitation. The methods address measurement of frequency and pulse-width in the presence of digitally modulated CW interference. We also discuss available technology with which to implement digital processors capable of hosting real-time implementations of practical algorithms based on these methods. The hardware design employs a full-mesh serial backplane for card-to-card data transfers and field programmable gate arrays for most of the real-time signal processing. The architecture of a digital processor takes the form of a parallel processing network specifically tailored to match the natural data flow structure of the algorithm it will host. We propose to analyze the various methods in the context of frequency and pulse-width measurement accuracy, and define an appropriate algorithm for an on-ship Navy system. We propose to then design the hardware platform tailored for this algorithm, and define a Phase II demonstration of the upgraded IFM algorithms running in real-time on that hardware platform.