Producibility of Higher Density Avionics

Increasing the density of seeker focal plane processing elements is critical to achieving multi-color, fine grained end-game target resolution and LADAR processing capabilities for missile interceptors. The objective of this research project is to continue development of new package stacking and interposer interconnect that allows 3-dimensional arrangement of programmable logic. This will result in a 4-fold increase in processing elements in a single seeker electronics board. In Phase I, feasibility of novel interconnect and stacking of Field Programmable Gate Array (FPGA) and Static Random Access Memory (SRAM) was demonstrated. Package stacking and the new array interconnect avoids the added weight, added signal latencies, signal integrity problems and reliability risks associated with the use of multiple boards and large connectors. Distributing signal routing to separate stacked interconnect elements reduces the complexity of any single element allowing these separate elements to be developed faster with higher yields and lower costs. Phase II will produce prototype hardware of the modular stacked package including the advanced distributed interconnect design developed in Phase I and testing of the hardware. Through a subcontract from Tessera, Lockheed Martin will provide schematic design support, test support and will contribute to the project the use of existing test facilities and hardware developed with Lockheed Martin resources.