A Radiation Tolerant Cryptograhic Architecture Using COTS FPGA's

Communications security (COMSEC) role in space continues to grow as the available bandwidth expands. The DOD Transformational Communications (TC) vision will transform the space, air, and ground networks into a fully integrated internet-like network. This vision requires cryptographic architectures that satisfy Crypto Modernization requirements, can host current and future cryptographic algorithms, and comply with the High Assurance Internet Protocol Interoperability Specification (HAIPIS). In addition, the architecture can be capable of taking advantage of the rapid rate of commercial FPGA technology development. These advances in technology are available at a much lower NRE cost than comparable custom designed crypto ASICs. In order to take advantage of these technology advances, crypto architectures are required that are robust enough to operate in the presence of semiconductor effects related to total dose, device latch-up, and single event errors. These errors could result in the space based crypto device either becoming inoperable, performance impaired, or potentially susceptible to transmitting erroneous information. This SBIR proposes a cryptographic architecture that utilizes various techniques to detect, correct, rollback, and continue operation in the presence of faults. The methods proposed include enhancements to circuitry, crypto control state machine logic, crypto control software, and algorithm implementation structures.