Silicon Brain Architecture

The technology now exists to bring human level recognition capabilities to military defense problems, at higher data rates and in environments unsustainable by humans. The proposed innovation synthesizes work at Irvine Sensors, Cal Tech, JPL, MIT, Boston University, UCSD and USC to provide a silicon emulation of the human central nervous system, including all of its sensory apparatus, to execute the sensing, discrimination, and systems control functions of ballistic missile defense. The approach emulates and exploits the massive parallelism inherent in the brain to achieve extremely high computational performance at very low power and small volume. Ultimately, petaflop performance will be attained within 20 watts and 10 cubic inches. In Phase I a baseline architecture will be selected for Phase II implementation. Also in Phase I this architecture will be simulated to include the hardware and software capabilities of the collaborating institutions. Critical 3D interconnect feasibility will be demonstrated experimentally in Phase I. For Phase II investment alliance will be formed to commercialize the technology. The silicon brain, like its human counterpart, will be a multi-sensor fusion machine, converting perception to action and verbal communication. It will be faster than humans, operable in hostile environments and untiring. Commercial applications include medical diagnostics, DNA sequencing, radiography, security systems, and recognition of speech and handwriting.