32-Bit Emulator Chip for High Throughput Processing

SPEC proposes to develop a high throughput emulator chip which will provide direct execution of existing AN/AYK-14 and/or MIL-STD-1750 standard codes on commercially available 32-bit microprocessor workstations and PCs. The emulator chip will provide a low cost and time saving technology for transferring military programs from AN/AYK-14 and/or MIL-STD-1750 computers to low cost, high performance microprocessor platforms. The migration of military software programs from 16-bit to 32-bit microprocessors through the proposed emulator chip will significantly improve military software program execution time and reduce future system maintenance costs. SPEC proposes to use an innovative four stage pipelining microprogramming architecture to design the emulator chip. Microprogramming will allow the AN/AYK-14 and/or MIL-STD-1750 computer instruction sets to be executed on multiple microprocessors. The pipelining is used to improve the performance of the emulator chip. An emulator chip designed with sub-micron CMOs technology will have a performance of above 100 MHz. With SPEC's GaAs technology, the performance could surpass 500 MHz. SPEC will provide designs, layouts, and simulations of a 32-bit high throughput emulator chip which can directly execute existing AN/AYK-14 or MIL- STD-1750 code targeting a commercially available 32-bit microprocessor.