SBIR Phase I: Development of the First SiC PEBB

This SBIR Phase I research project is to develop and commercialize the first silicon carbide monolithically integrated Power Electronic Building Block (PEBB). The proposed PEBB integrates a Vertical Junction gate Field Effect Transistor (VJFET) and a Junction Barrier Schottky (JBS) diode on the same chip. The innovations include a simple fully self-aligned process compatible with the PEBB fabrication, a design that permits the monolithic merging into a single JBS diode by a process without any extra step, a design and process permitting the fabrication of the fail-safe normally-off VJFET with submicron vertical channel by a completely self-aligned process which requires only one mask for fabricating the active part of the VJFET and is compatible with the PEBB integration, and a PEBB design suitable for synchronous rectification that can substantially reduce diode conduction loss and improve circuit efficiency. With a quickly-increasing amount of the electric power being processed by power electronic systems before their final consumption, improvements on efficiency and reliability of these systems can save a substantial amount of energy and lead to profound technological and social benefits in the years to come. The proposed PEBB can be applied to low-to-medium power applications that cover consumer electronics, industrial motor control, transportation (Hybrid Electric Vehicles, Plug-in Electric Vehicles) systems, military and space power applications.