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Award details
- Awarding agency
- Department of Defense
- Branch
- Defense Advanced Research Projects Agency
- Recipient company
- ATC-NY INC
- Proposal award date
- Not reported
- Contract end date
- Not reported
- UEI
- LE62V456GNB5
- Solicitation number
- Not reported
- Topic code
- Not reported
Research abstract
Theoretical research on asynchronous circuits has provided topdown methods that start from an operational description of a circuit. Top-down methods avoid the difficulty of understanding (let alone verifying) the behavior of compositions ofasynchronous components. In practice, however, design begins from a functional decomposition, often incorporating components previously designed. ATC-NY will develop a mathematically based, automated tool that allows asynchronous components and theirbehaviors to be designed and specified by compositional methods familiar to users of VHDL and Verilog. The tool will support an extensible design language, AHDL, that generalizes VHDL and can also incorporate components designed by other means. It willsupport both simulation (exploiting VHDL simulators) and formal verification of functional correctness. By integrating this tool with a suite of existing tools that perform top-down design, low-level synthesis, optimization, power estimation, and layoutwe support a complete design method that allows users to mix top-down and compositional steps, and to verify code either by simulation or by full formal proof. Asynchronous microprocessors offer the promise of high performance with low power consumption.The commercial development of asynchronous processors has been hindered by a lack of design tools. The introduction of powerful tools for asynchronous design opens up a vast market. Such tools will make possible the design of a new generation ofasynchronous circuits with superior performance - circuits useful for high-performance sensing, communication, and processing for current and future military systems.
Technology keywords
Not reported
Other awards by this recipient
Verified by the same UEI. These are other public SBIR/STTR award pages, not a merged company record.
Research funding history
143 SBIR/STTR records share this UEI (1983–2025). Reported award amounts total $44,477,719. Reported amounts are not federal obligations.
Phases: Phase I, Phase II, Phase II – Direct to Phase II
Agencies: Department of Defense, National Aeronautics and Space Administration, Department of Energy, National Science Foundation, Department of Homeland Security, Department of Commerce
Agency intelligence
Department of Defense
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