SBIR Phase II: Power-Aware Statically Speculative Microprocessors

This SBIR Phase II research project will develop energy-aware compiler techniques to reduce power and energy consumption in microprocessors, without affecting performance. A key principle behind this approach is to use speculative information available at compile time to reduce power and energy consumption. The key qualifier is speculative: the information does not have to be provably correct. Speculative information that turns out to be correct will enhance energy reduction; if it is incorrect, the worst that will happen is that a penalty (in terms of energy) will have to be paid. The use of such speculative compile-time information opens up a largely unexplored dimension in compilers and computer architectures, to target energy efficiency. Over the past few years, energy consumption by computers has emerged as a major area of intellectual and commercial activity. These techniques if successful will permit substantial savings in energy consumption. The outcome of the proposed effort will not merely be a set of products, but also a vastly increased understanding of the means by which compile-time information can be exploited for energy savings. With the increasing prevalence of battery-powered computing devices such as PDAs, mobile telephones, and notebooks, power-aware computing is becoming increasingly important commercially.