DEVELOPMENT OF A LOW COST CLUSTERED VAXBI FASTBUS INTERFACE

A LOW COST CLUSTERED INTELLIGENT LIST-PROCESSING INTERFACE BETWEEN THE VAXBI AND FASTBUS WILL BE DEVELOPED. THE VAXBI IS THE 13.3 MEGABYTE/SEC BACKPLANE INTERCONNECT FEATURED IN VAX 6210 THROUGH 6240, 6310 THROUGH 6360, 8200, 8250, 8300, 8350, 8500, 8530, 8550, 8700, 8800, AND 8810 THROUGH 8840 SYSTEMS, AS WELL AS CONFIGURATIONS CONSTRUCTED BY CLUSTERINGTHESE SYSTEMS AND OTHER FUTURE VAX SYSTEMS. THE INTENT IS TO PROVIDE A MODERN INTERFACE BETWEEN A VARIETY OF VAX CONFIGURATIONS AND FASTBUS, WHILE FEATURING (1) THE HARDWARE RELIABILITY, MAINTAINABILITY, AND COST EFFECTIVENESS OF MODERN APPLICATION SPECIFIC, VERY LARGE SCALE INTEGRATED (VLSI) CIRCUITRY AND (2) THE SIMPLICITY OF DESIGN ASSOCIATED WITH A LAYERED SOFTWARE STRUCTURE DESIGNEDTO SUPPORT INTELLIGENT STORAGE CONTROLLERS LOCATED IN A NETWORKED CLUSTERED ENVIRONMENT. THE HARDWARE WILL CONSIST OF SEVERAL ELEMENTS: A MICROCODED VAXBI I/O PROCESSOR BOARD MANUFACTURED BY DIGITAL EQUIPMENT CORPORATION; A SECOND VAXBI BOARD CONTAINING DATA BUFFERS AND ONE END OF A HIGH SPEED DATA LINK, PROBABLY IMPLEMENTED WITH 100 MEGABIT/SEC OPTICAL FIBER CABLING; A FASTBUS AUXILIARY BACK-PLANE CARD CONTAINING THE OTHER END OF THE LINK, AND A SINGLE WIDTH FASTBUS MODULE CONTAINING A BUFFERED HIGH SPEED UNINTELLIGENT FASTBUS MASTER AND SLAVE INTERFACE. BESIDES THE FIRMWARE FOR THE I/O PROCESSOR, THE SOFTWARE WILL CONSIST OF A VAX/VMS PORT DRIVER, A VAX/VMS CLASS DRIVER, AND A REMOTE I/O SERVER TIGHTLY COUPLED WITH THE KERNEL OF THE VAX/VMS EXECUTIVE. THIS LAST ELEMENT WILL PERMIT A FASTBUS USER WHO IS UTILIZING A CLASS DRIVER IN ONE VAX TO ACCESS A PORT DRIVER AND HARDWARE INTERFACE RESIDENT IN ANOTHER VAX THROUGH ANY INTERVENING CLUSTERING MEDIUM, E.G.,THE 10 MEGABIT/SEC ETHERNET, THE 70 MEGABIT/SEC CLUSTER INTERCONNECT (CI), OR ANY FUTURE SUCH MEDIUM.